New

Sr. Principal Custom Memory Architect

Marvell Semiconductor, Inc.
paid time off, flex time, 401(k)
United States, California, Santa Clara
5488 Marvell Lane (Show on map)
Apr 11, 2025
About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Custom Cloud Solutions (CCS) Architecture team is responsible for the developing novel solutions and defining product and technology requirements of Marvell's cutting-edge data center ASICs. As part of cross-functional organization, we collaborate with world's leading data center companies, internal engineering teams, partners with external IP, and technology companies to bring next generation SoC for cloud data center to reality. What You Can Expect Develop high-level specifications, product requirements, and solution architecture for HBM/DDR memory for custom compute products, and drive innovations for memory controller. Drive innovations and help shaping Marvell's HBM/DDR memory architecture strategy and roadmap, working with customers, internal stakeholders, and industry partners. Develop micro-architecture, detailed implementation specification, and verification and validation test-plan working closely with development teams. Collaborate with development, validation and operations team to ensure end-to-end product qualification and testing meeting all product requirements and KPIs. Develop and integrate memory system models and analyze performance (throughput, latency, QoS etc.) What We're Looking For Bachelor's degree in Computer Science, Electrical Engineering or related fields and 15+ years of related professional experience or Master's / PhD degree in Computer Science, Electrical Engineering or related fields with 8+ years of experience. Deep understanding and prior experience in analyzing and specifying DDR/HBM memory subsystem for data-center compute or XPUs. Design experience of HBM/DDR memory controller is a strong plus. In depth knowledge of memory technology such as HBM,LPDDR4/5 and relevant JEDEC memory standards Proven track record of developing system modeling for memory system to analyze performance and area/power trade-off. Strong expertise in developing ECC and RAS features for server-class product Strong conceptual thinking, problem solving and communication skills Ability to effectively collaborate across multiple teams and across multiple geographies Expected Base Pay Range (USD) 177,380 - 265,700, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com. #LI-TM1